1、用VPN下载器件库
版本和IDE一样
http://fpgasoftware.intel.com/?edition=standard
2、用管理员权限打开quartus ，Tools >Install Devices选择器件库
3、新建项目
选和板子一样的设备
4、写代码编译
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.std_logic_unsigned.ALL;
ENTITY Test1 is
PORT(
clk:in STD_LOGIC;
led1:out STD_LOGIC_VECTOR(11 DOWNTO 0));
END Test1;
ARCHITECTURE light OF Test1 IS
SIGNAL clk1 :std_logic;
BEGIN
P1:PROCESS (clk)
VARIABLE count:INTEGER RANGE 0 TO 9999999;
BEGIN
IF clk'EVENT AND clk='1' THEN
IF count<=4999999 THEN
clk1<='0';
count:=count+1;
ELSIF count>=4999999 AND count<=9999999 THEN
clk1<='1';
count:=count+1;
ELSE count:=0;
END IF;
END IF;
END PROCESS ;
P2:PROCESS(clk1)
variable count1:INTEGER RANGE 0 TO 16;
BEGIN
IF clk1'event AND clk1='1'THEN
if count1<=13 then
if count1=12 then
count1:=0;
end if;
CASE count1 IS
WHEN 0=>led1<="111111111110";
WHEN 1=>led1<="111111111101";
WHEN 2=>led1<="111111111011";
WHEN 3=>led1<="111111110111";
WHEN 4=>led1<="111111101111";
WHEN 5=>led1<="111111011111";
WHEN 6=>led1<="111110111111";
WHEN 7=>led1<="111101111111";
WHEN 8=>led1<="111011111111";
WHEN 9=>led1<="110111111111";
WHEN 10=>led1<="101111111111";
WHEN 11=>led1<="011111111111";
WHEN OTHERS=>led1<="111111111111";
END CASE;
count1:=count1+1;
end if;
end if;
end process;
END light;
5、设置管脚
6、下载程序
把Unused Pins中的Reverse all unused pins:选择为As input tri-stated。意思是说把不用的管脚设置为输入三态，Quartus默认这个选项是不用的管脚输出接地，这样最典型的现象是很可能你一下载代码到板子上蜂鸣器就响个不停
因为进程是并行的，所以不能在两个进程中给同一个变量赋值。
一个process里面只能有一个上升沿检测语句
