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Tools-Generate memory configuration file
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BIVC #1 Error Conflicting Vcc voltages in bank 71. For example, the following two ports in this bank have conflicting VCCOs:
c0_ddr4_reset_n (LVCMOS12, requiring VCCO=1.200) and c0_ddr4_dq[16] (LVCMOS18, requiring VCCO=1.800)
BIVC #2 Error Conflicting Vcc voltages in bank 73. For example, the following two ports in this bank have conflicting VCCOs:
c0_ddr4_dqs_t[0] (DIFF_POD12_DCI, requiring VCCO=1.200) and c0_ddr4_dq[8] (LVCMOS18, requiring VCCO=1.800)
[DRC BIVC-1] Bank IO standard Vcc: Conflicting Vcc voltages in bank 73. For example, the following two ports in this bank have conflicting VCCOs:
c0_ddr4_dqs_t[0] (DIFF_POD12_DCI, requiring VCCO=1.200) and c0_ddr4_dq[9] (LVCMOS18, requiring VCCO=1.800)
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